The Ericsson AXE-based systems are programmed using an internally developed language called Plex-C. Plex-C is normally compiled to execute on an Ericsson internal Processor architecture. A transition to standard processors is currently in progress. This makes it interesting to examine if Plex-C can be compiled to execute on the JVM, which would make it processor independent. The purpose of the thesis is to examine if parts of the run-time environment of Plex-C can be translated to Java and if this can be done so that sufficient performance is obtained.

This Master's Thesis describes the design of a new system where a digital signal processor has been added to an existing imaging system consisting of field programmable gate arrays. The new system will offer a higher degree of flexibility by considerably shortening the design time and make it possible to implement more complex algorithms than the existing ones. The choice of system architecture and a test implementation are discussed. The test implementation consists of a program for the digital signal processor and VHDL code for one of the field programmable gate arrays. The code for the digital signal processor was designed for testing on an evaluation board from Texas Instruments.

This report describes how to process audio signals in real time with a digital signalprocessor. The digital signal processor used in the thesis and described in the reportare the Blackfin processor ADSP-BF537 from Analog Devices.In the body of this report there is theory of the processor characteristics and thevarious programming languages used. All experiments that were made on theprocessor are described, these descriptions also help in understanding the annexeswhere the experiments will be presented. The body of this report also describes theprogram used to do experiments. Testing the CPU limit was done and the results arepresented to get a good view of what it can handle.

The purpose of this Master Thesis is to analyze what suitable hardware platforms there are on the market in order to build a low price control and information system for mobile applications, called small display module. The thesis will be underlying material for making a decision for further development. The result of the thesis consists mainly of a Windows CE kernel and a schematic for a CPU card, on which it would be suitable to build the display module. Another major part of the report is the introduction of different techniques that could be of interest when designing a processor based system. The Processor architecture that was chosen is the x86.

In this master thesis, the possibilities of customizing a low-cost microprocessor with the purpose of replacing an existing microprocessor solution are investigated. A brief survey of suitable processors is carried out wherein a replacement is chosen. The replacement processor is then analyzed and extended with accelerators in order to match set requirements.The result is a port of the processor Lattice Mico32 for the FPGA curcuit Xilinx Virtex-5 which replaces an earlier solution using Xilinx MicroBlaze. To reach the set requirements, accelerators for floating point arithmetics and FIR filtering have been developed. The toolchain for the processor has been modified to support the addition of accelerated floating point arithmetics.A final evaluation of the presented solution shows that it fulfills the set requirements and constitutes a functional replacement for the previous solution..

The Anybus CompactCom modules are today using the Anybus NP30 processor. These modules are used for communication between industrial machines and larger network protocols. The communication loads on these systems are increasing every day and the limiting factor for the system is the processor.HMS, the company that develops the Anybus CompactCom, has shown interest for a benchmark test between the old processor and a new processor, ARM Cortex-M3. This project includes that benchmark. To be able to get results that reflect reality a test environment was created to simulate Anybus CompactCom conditions.

Abstract The purpose of this project is to develop a modular processor card which is intended to work as a platform for Kitron Development Karlskoga. The modular processor card is meant to be used as a control system in development projects, mainly in medical and industrial products. The processor card will consist of a central unit with the basic functions for a control system. Furthermore there will be complete modules with machine commodity and programming, to pick exactly the necessary functions for a specific application. With consideration to the specification of the development and the main unit, I chose an adequate microprocessor (AT90CAN32) as core and interface circuits to stated border areas. The construction is first completed in the program MultiSim and then remade in the program OrCAD Capture. The programming language C was used in the software model.

This thesis deals with a Swedish shopping centre, NOVA, from a phenomenological point of view. Starting in my own experience of the architecture I discuss issues such as gender, consumerism and the image of the ideal society, the Heterotopia, as they appear to me in my studies of the building.Divided into three different themes I then discuss the aspects I?ve found through my meeting with the architecture in comparison to a number of texts on the subject.My phenomenological analysis, combined with earlier research, presents to me a number of aspects more evident than others, as I do my own interpretation of the building and its architecture..

The purpose with this report is to highlight the value which Enterprise Architecture (EA) can bring,including the effects that can emerge, for a business. In the report we also study how Enterprise Architecturemay serve as basis for generating even more business value. The study is based on a theoretical frameworkwhich covers the following perspectives; architecture design, strategy development, management of changeand evaluation of IT-investments. Gathering and analysis of empirical data has been performed using acustom-developed model which is based on a model from Sogeti called Dynamic Architecture (van DenBerg and van Steenbergen, 2006) and Innovation Value Institute?s maturity curve (Innovation ValueInstitute, 2008) for Enterprise Architecture management.Explaining the value of Enterprise Architecture is invariably an important topic since many organizationsexpect to be able to generate quick value of the investments made in Enterprise Architecture.

In game development, performance is everything and the Playstation 3 provides a unique platform for utilizing parallelization of code to achieve extremely high performance. In this master?s thesis the issue of animation with smooth skinning is migrated from being a GPU process to becoming a parallelized and 358% faster process. This method is incorporated in an existing commercial game engine and integrated in a currently in development title for the Playstation 3. An in-depth study covers parallel processors, the CELL processor, used in the Playstation 3, and how contemporary industry leading game developers are utilizing the same unique architecture to increase their own games? performance..

Uppgiften var att ta emot och avkoda en radiosignal för tidsangivelse, DCF77. Avkodaren implementerades i en FPGA-krets från ALTERA. Utvecklingen genomfördes i Quartus II-miljön med språket VHDL samt en alternativ lösning där mjuk processor användes. Både utvecklingsmiljön och språken var väl lämpade för uppgiften. Ett genomgående problem var dock radiomottagaren ofta levererade för svag signal för att kunna avkodas korrekt.

Att ansluta en digital signalprocessor kräver ett omfattande arbete. Innehållet i denna rapport sammanfattar teoretiska metoder för att integrera den digitala signalprocessorn ADAU1701 i talförstärkaren MMT-4, utvecklad av företaget Xena Medical. Arbetet har till största delen bestått i att finna en lämplig DSP och studera dess datamanual för att anpassa den till talförstärkaren.Mycket av rapporten sammanfattar beräkningar av komponentvärden och anpassning av ADAU1701 för MMT-4:s behov. ADAU1701 beskrivs utifrån det så kallade selfboot-läget där processorn kan arbeta som fristående processor..

For systems with multicore processors contention for shared resources is a problem that occurs when several memory-intensive processes are executed in parallel within the same memory domain. This contention has a direct influence on the performance of the system and is a complex problem that has been recognized for a long time. An attractive and actively studied way to minimize this problem is by using a process scheduler adapted to allocate processor cores in a way such that contention for shared resources is minimized.With the introduction of multicore NUMA-systems (Non-Uniform Memory Access) the situation has become even more complex. In these systems the access time for processor cores to different memory domains vary depending on factors such as distance and load. Thus, the process scheduler also has to consider where the memory of each process is placed to minimize the distance and balance the load on each memory domain.This report presents a user-level process scheduler for a NUMA-system based on the multicore processor Tilera TILEPro64.

This thesis analyses the problem of how to organise a multidisciplinary domain of knowledge like architecture. The study is both theoretical and empirical. The theoretical part include discussions of theories of knowledge organisation. Two different principles of classification were examined in relation to the domain itself, as well as in relation to the educational programme at the School of Architecture at Lund University and comparable schools in Sweden. The empirical part is a case study carried out at the School of Architecture at Lund University.

This essay tries to show how The Swedish Museum of Architecture, Stockholm, with the exibition Architecture in Sweden - Function, Design and Aesthetic through the Ages, presents and represents architecture. It is stated that this is done in a multi-perspectival, multimedial fashion, with the aid of, for example, photography, models and mixed material surrounding the wide concept of ?architecture?. One chapter discusses the relationships between the exhibition on site, the exhibition catalog and the museum´s website. Another chapter argues that there can be no essential or perfect representation of architecture, although this utopian wish most certainly exists even today.